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Building AI Silicon

TenstorrentCited 4× on HN, 2022–2022
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talk · intermediate · 2022–2022 on HN

Jim Keller, CTO of Tenstorrent, talks at Samsung Foundry's SAFE 2021 about building AI silicon through modular, provable design. The talk also touches on Tenstorrent's RISC-V Ascalon core.

HN cites it as a source on Tenstorrent's wide-issue RISC-V Ascalon CPU in RISC-V threads.

Computer architecture & CPUsSemiconductors & chip manufacturingMachine learning & deep learning#jimkeller#tenstorrent#risc-v#ascalon

4 comments from Hacker News

@snvzz2022-09 · in “NASA selects SiFive and makes RISC-V the go-to ecosystem for future missions”

They're apparently working on one, in-house[0]. It's apparently called Ascalon, and there's some information starting at around 8 minutes into the video. 0. ▶ this video

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@hajile2022-03 · in “RISC-V is succeeding”

Jim Keller's team is creating a 6-wide issue RISC-V CPU. It should have similar IPC as ARM X1 or AMD Zen 3. ▶ this video

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@hajile2022-03 · in “RISC-V is succeeding”

Jim Keller is overseeing a very large RISC-V core that should be around the same performance level as X1 or Zen 3. I guess we'll see what the ISA can do pretty soon. He said they were talking about open-sourcing the CPU block. If they did (the CPU isn't their core business), we could see lots of RISC-V competition popping up. The age of CPUs being commodity items seems to be approaching. ▶ this video

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@abdullin2022-02 · in “A Big Week for RISC-V”

Jim Keller is building RISC-V Ascalon processor at Tenstorrent right now. ▶ this video If I recall correctly, some things were planned to be open sourced.

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